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Chair of Computer Science 3
Stefan Potyra
Research
Papers
Teaching
Contact
Dept. of Computer Science  > CS 3  > Persons  > Potyra

Dipl.-Inf. Stefan Potyra

Since June 2007, Stefan Potyra is a member of the research staff at the Chair of Computer Architecture.
He holds a Master's Degree (Diplom-Informatiker) in Computer Science.

Research Interests

Main research interests cover Virtual Machines and Hardware- Software-Cosimulation.
He is involved in the
FAUmachine project and is the main author of fauhdlc.

Publications

  • Potyra, Stefan; Sand, Matthias; Sieh, Volkmar; Fey, Dietmar:
    Performantes Testen von fehlertoleranten Hard- und Software-System in der virtuellen Maschine FAUmachine.
    In: Universität Paderborn; GI Gesellschaft für Informatik; ITG Informationstechnische Gesellschaft im VDE; VDE/VDI-Gesellschaft Mikroelektronik, Mikro- und Feinwerktechnik (GMM) (Org.): 22. Workshop "Testmethoden und Zuverlässigkeit von Schaltungen und Systemen"
    (22. Workshop "Testmethoden und Zuverlässigkeit von Schaltungen und Systemen", Paderborn, 28.02.2010 - 02.03.2010).
    2010, pp. 121-122.
  • Potyra, Stefan; Sand, Matthias; Sieh, Volkmar; Fey, Dietmar:
    Rapid Prototyping mit FAUmachine am Beispiel einer VHDL-PCI-Soundkarte.
    In: Elst, Günter (Ed.): DASS 2010 Dresdner Arbeitstagung für Schaltungs- und Systementwurf
    (DASS 2010 Dresdner Arbeitstagung für Schaltungs- und Systementwurf, Dresden, 18./19.05.2010).
    Stuttgart: Fraunhofer Verlag, 2010, pp. 123-128.
  • Potyra, Stefan; Sand, Matthias; Sieh, Volkmar; Fey, Dietmar:
    Seamless High Speed Simulation of VHDL Components in the Context of Comprehensive Computing Systems using the Virtual Machine FAUmachine.
    In: Johansson, Björn; Jain, Sanjay; Montoya-Torres, Jairo; Hugan, Joe; Yücesan, Enver (Ed.): Proceedings of the 2010 Winter Simulation Conference
    (2010 Winter Simulation Conference, Baltimore, MD, USA, 05.-08.12.2010).
    Baltimore, MD, USA: IEEE, 2010, pp. 891-902.
  • Sand, Matthias; Potyra, Stefan; Sieh, Volkmar:
    Deterministic High-Speed Simulation of Complex Systems Including Fault-Injection.
    In: Kaaniche, Mohamed (Ed.): Proc. of the 39th Intern. Conf. on Dependable Systems and Networks
    ((DSN 2009), Estoril, Portugal, 29.06. - 02.07.2009).
    2009, pp. k.A..
  • Potyra, Stefan; Sieh, Volkmar:
    High-Speed Hardware/Software Cosimulation of Complex Systems including Fault-Injection of Detailed VHDL-Models for PC-Components.
    In: n.b. (Ed.): Supplement to Proc. Seventh European Dependable Computing Conference
    (Seventh European Dependable Computing Conference, Kaunas, Lithuania, May 7-9).
    Kaunas: Vytautas Magnus University, 2008, pp. 59-62. - ISBN 978-9955-12-339-2
  • Potyra, Stefan; Sieh, Volkmar; Dal Cin, Mario:
    Evaluating fault-tolerant system designs using FAUmachine.
    In: n.b. (Ed.): EFTS '07: Proceedings of the 2007 Workshop on Engineering Fault Tolerant Systems
    (Workshop on Engineering Fault Tolerant Systems, Dubrovnik, Croatia).
    New York, NY, USA: ACM, 2007. - ISBN 978-1-59593-725-4

Teaching

Contact

Stefan Potyra
Informatik 3
Martensstraße 3
91058 Erlangen
Germany

Room:
Phone:
Fax:
E-Mail:

07.134
+49 (0) 9131 85 27028
+49 (0) 9131 85 27912
Stefan.Potyra@informatik.uni-erlangen.de
  Contact Last modified: 2011-06-08 09:41:06   VS