Friedrich-Alexander-Universität Univis FAU-Logo
Techn. Fakultšt Welcome at the Dept. of CS FAU-Logo
Logo i3
Chair of Computer Science 3
KOMINA
Dept. of Computer Science
Nano-Arch online Logo

Nano-Arch online

An online practical course for future digital computing nanosystem architectures

To teach MSc computer science students in the evolving field of future nanosystems, we are developing the online practical course "Nano-Arch online". To address a wide audience and offer the course internationally, it will be available in English.

Theory

The practical course is built of two parts: Theory and design and simulation. Theory will cover electrodynamics and classic transistor technology, to give students the basic background for the practical course. Because of the predicted higher failure rate of future nanodevices, failure resiliency methods and techniques on architecture level, to overcome these challenging boundary conditions, are taught. These include redundancy, redundant encodings, reconfiguration and reversible logic. Also included are the physical basics of the memristor, a new device that works as a alterable resistor that memorises its resistance - memory+resistor = memristor.

Memristor symbol Preliminary symbol for the memristor

Practical work

The practical part will take advantage of a design and simulation software to develop resilient circuits from Quantum-dot Cellular Automata (QCA). As robustness is expensive, regarding the area that a QCA circuit consumes, there is a method to transform standard logic gates into a majority gate based logic. By the use of majority logic in QCA circuits, the gates, and therefor the area of the circuit, can be drastically reduced. Students will develop the circuits with standard logic and then transform them into majority gates based logic and evalutate their designs.

To design and simulate circuits and memory from memristor nanodevices, we develop a design and simulation software. Students will design and simulate 3D memristor layouts and use memristors as switchable connections between interconnecting nano tubes and CMOS computing layers.

QCA cells are perfect for boolean logic Binary 0 and 1 representation in QCA logic
An OR-gate in QCA An OR-gate can be built from five QCA cells
Screenshot of the simulation software
A binary adder designed from QCA cells
Inputs are on the bottom left, outputs on the top right

To give you an imagination, what a topic of Nano-Arch online will look like, you can download the materials of the QCA chapter. To have a look at the quick reference slides click here, to have a look at the detailed script click here.

  Contact Last modified: 2012-10-10 17:58:10   BK