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Gesellschaft für Informatik e.V. (GI) Informationstechnische Gesellschaft im VDE (ITG)

ARCS 2016 - Architecture of Computing Systems

04-07 April 2016, Nuremberg, Germany
Friedrich-Alexander University Erlangen-Nürnberg » Chair of Computer Science 3 (Computer Architecture) » ARCS 2016

Conference Program

Program


Please Note

  • Please bring your presentation on a USB stick (make a folder if not a single file) and make sure your presentation has been copied to the presentation notebook before the start of your session
  • We provide a presentation notebook (MacBook, OS X 10.11.4) with Acrobat Reader (2015), Keynote (6.6.1), LibreOffice (5.1.1.3) and Office for Mac 2011. To avoid problems with different versions of tools, a PDF version of your presentation is preferred
  • Lunch on Tuesday is included for both kinds of Registration (Conference & Workshops as well as Workshops/Tutorials)
  • On-Site Registration and Information desk times are as follows:
    Monday:11:00 - 16:30
    Tuesday:08:00 - 16:30
    Wednesday:08:00 - 16:30
    Thursday:08:00 - 13:30



Monday, April 4, 2016


12:30 - 15:50 FORMUS³IC Workshop (Starts at 12:45, Room 00.423) → Detailed Program

PASA Workshop (Starts at 13:15, Room 02.429) → Detailed Program

SAOS Workshop (Room 00.424) → Detailed Program
15:50 - 16:20 Coffee Break
16:20 - 18:00 FORMUS³IC Workshop (Room 00.423)→ Detailed Program

SAOS Workshop (Room 00.424) → Detailed Program


Tuesday, April 5, 2016


08:30 - 10:20 MOMAC Workshop (Room 02.429) → Detailed Program

VERFE Workshop (Starts at 09:00, Room 00.423) → Detailed Program

Tutorial: "Massively Parallel Task-Based Programming with HPX" (Room 00.424)
10:20 - 10:50 Coffee Break
10:50 - 12:30 MOMAC Workshop (Room 02.429)→ Detailed Program

VERFE Workshop (Room 00.423)→ Detailed Program

Tutorial: "Massively Parallel Task-Based Programming with HPX" (Room 00.424)
12:30 - 13:45 Lunch
13:45 - 14:00 Welcome
Dietmar Fey and Frank Hannig (Friedrich-Alexander University Erlangen-Nürnberg, Germany)
14:00 - 15:00 Keynote 1

"Knights Landing Intel Xeon Phi CPU: Path to Parallelism with General Purpose Programming"
Avinash Sodani, Chief Architect 'Knights Landing' Xeon-Phi processor at Intel Corp.

Chair: Dietmar Fey (Friedrich-Alexander University Erlangen-Nürnberg, Germany)
15:00 - 15:50 Session 1: "Configurable and In-Memory Accelerators"

"Towards Multicore Performance with Configurable Computing Units"
Anita Tino and Kaamran Raahemifar

"Design and Evaluation of a Processing-in-Memory Architecture for the Smart Memory Cube"
Erfan Azarkhish, Davide Rossi, Igor Loi and Luca Benini

Chair: Dietmar Fey (Friedrich-Alexander University Erlangen-Nürnberg, Germany)
15:50 - 16:20 Coffee Break
16:20 - 18:00 Session 2: "Network-on-Chip and Secure Computing Architectures"

"CASCADE: Congestion Aware Switchable Cycle Adaptive Deflection Router"
Jonna Gnaneswara Rao, Thuniki Vamana Murthi and Mutyam Madhu

"An Alternating Transmission Scheme for Deflection Routing based Network-on-Chips"
Armin Runge and Reiner Kolla

"Exzess: Hardware-based RAM Encryption against Physical Memory Disclosure"
Alexander Würstlein, Michael Gernoth, Johannes Götzfried and Tilo Müller

"Hardware-Assisted Context Management for Accelerator Virtualization: A Case Study with RSA"
Ying Gao and Timothy Sherwood

Chair: Christian Müller-Schloer (Leibniz Universität Hannover, Germany)
19:00 Guided City Tour


Wednesday, April 6, 2016


08:30 - 09:30 Keynote 2

"Massive Parallelism - C++ and OpenMP Parallel Programming Models of Today and Tomorrow"
Michael Wong, ISOCPP.org, OpenMP CEO

Chair: Frank Hannig (Friedrich-Alexander University Erlangen-Nürnberg, Germany)
09:30 - 10:20 Session 3: "Cache Architectures and Protocols"

"Adaptive Cache Structures"
Carsten Tradowsky, Enrique Cordero, Christoph Orsinger, Malte Vesper and Jürgen Becker

"Optimization of a Linked Cache Coherence Protocol for Scalable Manycore Coherence"
Ricardo Fernández-Pascual, Alberto Ros and Manuel E. Acacio

Chair: Frank Hannig (Friedrich-Alexander University Erlangen-Nürnberg, Germany)
10:20 - 10:50 Coffee Break
10:50 - 12:30 Session 4: "Mapping of Applications on Heterogeneous Architectures and Real-Time Tasks on Multiprocessors"

"Generic algorithmic scheme for 2D stencil applications on heterogeneous hybrid machines"
Stephane Vialle, Sylvain Contassot-Vivier and Patrick Mercier

"GPU-Accelerated BWA-MEM Genomic Mapping Algorithm Using Adaptive Load Balancing"
Ernst Houtgast, Vlad-Mihai Sima, Koen Bertels and Zaid Al-Ars

"Task Variants with Different Scratchpad Memory Consumption in Multi-Task Environments"
Martin Böhnert and Christoph Scholl

"Feedback-Based Admission Control for Hard Real-Time Task Allocation under Dynamic Workload on Many-core Systems"
Piotr Dziurzanski, Amit Singh and Leandro Indrusiak

Chair: Zoran Salcic (The University of Auckland, New Zealand)
12:30 - 13:45 Lunch
13:45 - 15:50 Session 5: "All About Time: Timing, Tracing, and Performance Modeling"

"Data Age Diminution in the Logical Execution Time Model"
Christian Bradatsch, Florian Kluge and Theo Ungerer

"Accurate Sample Time Reconstruction for Sensor Data Synchronization"
Sebastian Stieber, Rainer Dorsch and Christian Haubelt

"DiaSys: On-Chip Trace Analysis for Multi-Processor System-on-Chip"
Philipp Wagner, Thomas Wild and Andreas Herkersdorf

"Analysis of Intel's Haswell Microarchitecture Using The ECM Model and Microbenchmarks"
Johannes Hofmann, Dietmar Fey, Jan Eitzinger, Georg Hager and Gerhard Wellein

"Measurement-Based Probabilistic Timing Analysis for Graphics Processor Units"
Kostiantyn Berezovskyi, Fabrice Guet, Luca Santinelli, Konstantinos Bletsas and Eduardo Tovar

Chair: Jürgen Brehm (Leibniz Universität Hannover, Germany)
15:50 - 16:20 Coffee Break
16:20 - 18:00 Session 6: "Approximate and Energy-Efficient Computing"

"Reducing Energy Consumption of Data Transfers using Runtime Data Type Conversion"
Michael Bromberger, Vincent Heuveline and Wolfgang Karl

"Balancing High-Performance Parallelization and Accuracy in Canny Edge Detector"
Valery Kritchallo, Billy Braithwaite, Erik Vermij, Koen Bertels and Zaid Al-Ars

"Analysis and Exploitation of CTU-Level Parallelism in the HEVC Mode Decision Process Using Actor-based Modeling"
Rafael Rosales, Christian Herglotz, Michael Glaß, André Kaup and Jürgen Teich

"Low-Cost Hardware Infrastructure for Runtime Thread Level Energy Accounting"
Marius Marcu, Oana Boncalo, Madalin Ghenea, Alexandru Amaricai, Jan Weinstock, Rainer Leupers, Zheng Wang, Giorgis Georgakoudis, Dimitrios Nikolopoulos, Cosmin Cernazanu-Glavan, Lucian Bara and Marian Ionascu

Chair: Andreas Herkersdorf (TU München, Germany)
19:30 Banquette


Thursday, April 7, 2016


08:30 - 09:30 Keynote 3

"Heterogeneous Systems Era"
John Glossner, President of the Heterogeneous System Architecture Foundation (HSAF), CEO of Optimum Semiconductor Technologies

Chair: Jürgen Teich (Friedrich-Alexander University Erlangen-Nürnberg, Germany)
09:30 - 10:20 Session 7: "Allocation: From Memories to FPGA Hardware Modules"

"Reducing NoC and Memory Contention for Manycores"
Vishwanathan Chandru and Frank Mueller

"An Efficient Data Structure for Dynamic Two-Dimensional Reconfiguration"
Sándor Fekete, Jan-Marc Reinhardt and Christian Scheffer

Chair: Jürgen Teich (Friedrich-Alexander University Erlangen-Nürnberg, Germany)
10:20 - 10:50 Coffee Break
10:50 - 12:05 Session 8: "Organic Computing Systems"

"Runtime Clustering of Similarly Behaving Agents in Open Organic Computing Systems"
Jan Kantert, Richard Scharrer, Sven Tomforde, Sarah Edenhofer and Christian Müller-Schloer

"Comparison of Dependency Measures for the Detection of Mutual Influences in Organic Computing Systems"
Stefan Rudolph, Rainer Hihn, Sven Tomforde and Jörg Hähner

"Augmenting the Algorithmic Structure of XCS by Means of Interpolation"
Anthony Stein, Dominik Rauh, Sven Tomforde and Jörg Hähner

Chair: Haluk Rahmi Topçuoğlu (Marmara University, Turkey)
12:05 - 12:15 Bio Break
12:15 - 13:30 Session 9: "Reliability Aspects in NoCs, Caches, and GPUs"

"Estimation of End-to-end Packet Error Rates for NoC Multicasts"
Michael Vonbun, Thomas Wild and Andreas Herkersdorf

"Protecting Code Regions on Asymmetrically Reliable Caches"
Sanem Arslan, Haluk Topcuoglu, Mahmut Kandemir and Oğuz Tosun

"A New Simulation-based Fault Injection Approach for the Evaluation of Transient Errors in GPGPUs"
Sarah Azimi, Boyang Du and Luca Sterpone

Chair: Wolfgang Karl (Karlsruhe Institute of Technology, Germany)
13:30 Closing
Proceedings

Proceedings

The proceedings of ARCS 2016 are published in the Springer Lecture Notes on Computer Science (LNCS) series, Vol 9637.

Latest News

08.04.2016
The ARCS 2016 organization team would like to thank all participants for allowing such a great event!

07.04.2016
Best Paper Award for Armin Runge → Link

Contact

Prof. Dr.-Ing. Dietmar Fey
Email: dietmar.fey@fau.de

Friedrich-Alexander University Erlangen-Nürnberg
Chair of Computer Science 3 (Computer Architecture)
Martensstr. 3
91058 Erlangen, Germany

Tel.: +49 9131 85 27002
and +49 9131 85 27003
Fax: +49 9131 85 27912

Important Dates

Paper Submission Deadline:
Oct. 26, 2015

Extended Paper Submission Deadline:
Nov. 09, 2015

Workshop & Tutorial Proposals:
Nov. 30, 2015
Notification of Acceptance:
Dec. 21, 2015
Camera-Ready Papers:
Jan. 11, 2016